ST STM32F2 Series - Page 79

STM32F2 Series function Diagnostic Description Rank Perm Trans
USB HS/FS
USB_SM_0 Periodical read-back of configuration registers ++ X X
USB_SM_1 Protocol error signals ++ X X
USB_SM_2 Information redundancy techniques on messages ++ X X
USB_SM_3
Information redundancy techniques on messages,
including end-to-end safing
+ X X
ADC
ADC_SM_0 Periodical read-back of configuration registers ++ X X
ADC_SM_1 Multiple acquisition by application software ++ - X
ADC_SM_2 Range check by application software ++ X X
ADC_SM_3 Periodical software test for ADC ++ X -
ADC_SM_4 1oo2 scheme for ADC inputs + X X
DAC
DAC_SM_0 Periodical read-back of configuration registers ++ X X
DAC_SM_1 DAC output loopback on ADC channel ++ X X
Basic timers TIM6/7
GTIM_SM_0 Periodical read-back of configuration registers ++ X X
GTIM_SM_1 1oo2 for counting timers ++ X X
Advanced, general and low-power timers
TIM1/2/3/4/5/8/9/10/11/12/13/14
ATIM_SM_0 Periodical read-back of configuration registers ++ X X
ATIM_SM_1 1oo2 for counting timers ++ X X
ATIM_SM_2 1oo2 for input capture timers ++ X X
ATIM_SM_3 Loopback scheme for PWM outputs ++ X X
ATIM_SM_4 Lock bit protection for timers + - -
CRC CRC_SM_0 CRC self-coverage ++ X X
GPIO
GPIO_SM_0 Periodical read-back of configuration registers ++ X X
GPIO_SM_1 1oo2 for input GPIO lines ++ X X
GPIO_SM_2 Loopback scheme for output GPIO lines ++ X X
GPIO_SM_3 GPIO port configuration lock register + - -
RTC
RTC_SM_0 Periodical read-back of configuration registers ++ X X
RTC_SM_1 Application check of running RTC ++ X X
RTC_SM_2 Information redundancy on backup registers + X X
RTC_SM_3
Application-level measures to detect failures in
timestamps or event capture
o X X
Power control
VSUP_SM_0 Periodical read-back of configuration registers ++ X X
VSUP_SM_1 Supply voltage monitoring ++ X -
VSUP_SM_2 Independent Watchdog ++ X -
VSUP_SM_3 Internal temperature sensor check o - -
VSUP_SM_4 Peripheral Voltage Monitoring (PVM) + X -
Clock and Reset
CLK_SM_0 Periodical read-back of configuration registers ++ X X
CLK_SM_1 CSS Clock Security System ++ X -
CLK_SM_2 Independent Watchdog ++ X -
CLK_SM_3 Internal clock cross-measure + X -
IWDG/WWDG
WDG_SM_0 Periodical read-back of configuration registers ++ X X
WDG_SM_1 Software test for watchdog at startup o X -
Debug DBG_SM_0 Independent watchdog ++ X X
UM1845
Conditions of use
UM1845 - Rev 4
page 79/108