Managing DBGMCU registers AN4989
96/118 AN4989 Rev 3
Figure 71. DBGMCU_CR HAL Library Functions
For M0 Cortex based families (L0/F0) DBGMCU module need to be clocked by setting bit 22
of register RCC_APB2ENR (refer to the corresponding reference manual) prior to be
written.
RCC->APB2ENR |= RCC_APB2ENR_DBGMCUEN;
Some HAL macros are also available to Enable/Disable this clock.
__HAL_RCC_DBGMCU_CLK_ENABLE();
HAL_DBGMCU_EnableDBGStopMode();
HAL_DBGMCU_EnableDBGStandbyMode();
HAL_DBGMCU_EnableDBGSleepMode();
__HAL_RCC_DBGMCU_CLK_DISABLE();
A.2 By debugger
In order to avoid debugging specific lines in the source code, there are several possibilities
to set DBGMCU registers through debugger interfaces or scripts.
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