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Supermicro CSE-743TQ-903B-SQ User Manual

Supermicro CSE-743TQ-903B-SQ
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72
Chassis SC743 User's Manual
Rear Connectors and Pin Denitions
#1. CPLD Chip
The CPLD is an enclosure management chip that supports the SGPIO and LED management.
#2. JTAG Connector
The JTAG connector, designated J16, is used for diagnostic purposes. This connector
should not be used as it is for internal testing only.
#3. 4. SAS3 Ports
The SAS3 ports are used to connect the SAS3 drive cables. The 2 ports are designated
JSM0, for drives at SAS #0-#3, and JSM1, for drives at SAS #4-#7 (see section 2-4 for
SAS drive locations). Each port is also compatible with SATA drives. However, mixing SAS3
and SATA drives in the same enclosure is not recommended.
#5. #7. Backplane Main Power Connectors
The 4-pin connectors, designated JPW1,
JPW2, and JPW3, provide power to the
backplane. See the table on the right for pin
denitions.
Backplane Main Power
4-Pin Connector
Pin# Denition
1 +12V
2 and 3 Ground
4 +5V

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Supermicro CSE-743TQ-903B-SQ Specifications

General IconGeneral
BrandSupermicro
ModelCSE-743TQ-903B-SQ
CategoryChassis
LanguageEnglish

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