Chapter 1 Basics Manual VIPA System 300S SPEED7
1-4 HB140E - CPU SC - RE_313-6CF03 - Rev. 07/45
Operating structure of a CPU
The CPU contains a standard processor with internal program memory. In
combination with System 300S peripherals the unit provides a powerful
solution for process automation applications within the System 300 family.
A CPU supports the following modes of operation:
• cyclic operation
• timer processing
• alarm controlled operation
• priority based processing
Cyclic processing represents the major part of all the processes that are
executed in the CPU. Identical sequences of operations are repeated in a
never-ending cycle.
Where a process requires control signals at constant intervals you can
initiate certain operations based upon a timer, e.g. not critical monitoring
functions at one-second intervals.
If a process signal requires a quick response you would allocate this signal
to an alarm controlled procedure. An alarm can activate a procedure in
your program.
The above processes are handled by the CPU in accordance with their
priority. Since a timer or an alarm event requires a quick reaction, the
CPU will interrupt the cyclic processing when these high-priority events
occur to react to the event. Cyclic processing will resume, once the
reaction has been processed. This means that cyclic processing has the
lowest priority.
General
Cyclic processing
Timer processing
Alarm controlled
processing
Priority based
processing
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