VIPA System 300S SPEED7 CPU 313SC/DPM - Page 31

Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
HB140E - CPU SC - RE_313-6CF03 - Rev. 07/45 3-5
There are 2 RS485 interfaces X2 and X3 integrated to the CPU. The
interface X2 is fix set to MPI communication.
The functionality of the interface X3 may freely be configured. Here the
functionality of this interface may be configured at the virtual SPEED-Bus
by means of the parameter "Function RS485 ..." of the hardware
configuration.
The interfaces has the following functionality:
MPI Profibus PtP
X2
X
X3
X* X
* Default
Both interfaces have the same pin assignment:
9-pin SubD jack
Pin Assignment
1 n.c.
2 M24V
3 RxD/TxD-P (line B)
4 RTS
5 M5V
6 P5V
7 P24V
8 RxD/TxD-N (line A)
5
4
3
2
1
9
8
7
6
9 n.c.
The MPI interface handles the data exchange between CPU and PC. Via a
bus communication you may transfer applications and data between the
CPU that are connected via MPI. Standard setting is MPI Address 2.
With the PtP functionality the RS485 interface is allowed to connect via
serial point-to-point connection to different source res. target systems. The
protocols ASCII, STX/ETX, 3964R, USS and Modbus-Master (ASCII, RTU)
are supported.
The PtP communication is configured during run-time by means of the SFC
216 (SER_CFG). The communication happens by means of the SFC 217
(SER_SND) and SFC 218 (SER_RCV).
RS485
interfaces X2 / X3
Pin assignment
MPI functionality
PtP functionality