VIPA System 300S SPEED7 CPU 313SC/DPM User Manual

Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 313SC/DPM
HB140E - CPU SC - RE_313-6CF03 - Rev. 07/45 4-5
You may access the modules with read res. write accesses to the
peripheral bytes or the process image.
To define addresses a hardware configuration may be used. For this, click
on the properties of the according module and set the wanted address.
If you do not like to use a hardware configuration, an automatic addressing
comes into force.
At the automatic address allocation DIOs occupy depending on the slot
location always 4byte and AIOs, FMs, CPs always 16byte at the bus.
Depending on the slot location the start address from where on the
according module is stored in the address range is calculated with the
following formulas:
DIOs: Start address = 4⋅(slot -4)
AIOs, FMs, CPs: Start address = 16⋅(slot -4)+256
SC CPU
4567
4, 5, ...
Start
address
digital:
analog:
12
304
8
288
4
272
0
256
Slot number
The following sample shows the functionality of the automatic address
allocation:
0
.
.
8
9
.
.
.
.
12
13
.
.
255
256
.
.
.
320
.
.
.
335
.
.
.
.
.
.
2048
.
.
.
8191
0
1
.
.
.
.
.
.
.
12
13
.
.
.
255
256
.
.
.
.
272
287
.
.
.
.
2048
.
.
.
8191
PII
SC CPU
Input Byte
Address Periphery area
Input Byte
Input Byte
Output Byte
Periphery area Address
analog
digital
analog
digital
PIQ
Slot number: 4 5 6 7 8
Input Byte
up to max. 127
Output Byte
Output Byte
Output Byte
Output Byte
Output Byte
.
.
.
Input Byte
Input Byte
Bus
DI 16xDC24V
AI 8x12Bit
DO 16xDC24V
DIO 16xDC24V
AO 4x12Bit
up to max. 127
Define addresses
by hardware
configuration
Automatic
addressing
Example for
automatic address
allocation

VIPA System 300S SPEED7 CPU 313SC/DPM Specifications

General

Brand	VIPA
Model	System 300S SPEED7 CPU 313SC/DPM
Category	Control Unit
Language	English