Xilinx KCU105 User Manual

KCU105 Board User Guide www.xilinx.com 54
UG917 (v1.4) September 25, 2015
Chapter 1: KCU105 Evaluation Board Features
Tab le 1- 18 lists the HDMI Codec U52 to the XCKU040 device U1 connections. All HDMI nets
in this table are series resistor coupled.
For more information about the Analog Devices ADV7511KSTZ-P, see the Analog Devices
website [Ref 32]. For additional information about HDMI IP options, see the DisplayPort
LogiCORE Product Guide (PG064) [Ref 10].
Table 1-18: HDMI Codec U52 to XCKU040 Device U1 Connections
FPGA (U1)
Pin
Schematic Net
Name
FPGA (U1)
Direction
I/O Standard
ADV7511 U52
Pin Number Name
AK11 HDMI_D0 Output LVCMOS18 88 D8
AP11 HDMI_D1 Output LVCMOS18 87 D9
AP13 HDMI_D2 Output LVCMOS18 86 D10
AN13 HDMI_D3 Output LVCMOS18 85 D11
AN11 HDMI_D4 Output LVCMOS18 84 D12
AM11 HDMI_D5 Output LVCMOS18 83 D13
AN12 HDMI_D6 Output LVCMOS18 82 D14
AM12 HDMI_D7 Output LVCMOS18 81 D15
AL12 HDMI_D8 Output LVCMOS18 80 D16
AK12 HDMI_D9 Output LVCMOS18 78 D17
AL13 HDMI_D10 Output LVCMOS18 74 D18
AK13 HDMI_D11 Output LVCMOS18 73 D19
AD11 HDMI_D12 Output LVCMOS18 72 D20
AH12 HDMI_D13 Output LVCMOS18 71 D21
AG12 HDMI_D14 Output LVCMOS18 70 D22
AJ11 HDMI_D15 Output LVCMOS18 69 D23
AE11 HDMI_DE Output LVCMOS18 97 DE
AE12 HDMI_SPDIF Output LVCMOS18 10 SPDIF
AF13 HDMI_CLK Output LVCMOS18 79 CLK
AH13 HDMI_VSYNC Output LVCMOS18 2 VSYNC
AE13 HDMI_HSYNC Output LVCMOS18 98 HSYNC
AJ13 HDMI_INT
(1)
Input LVCMOS18 45 INT
AF12 HDMI_SPDIF_OUT Input LVCMOS18 46 SPDIF_OUT
Notes:
1. The HDMI_INT net is direct coupled (no series resistor).
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Xilinx KCU105 Specifications

General

Brand	Xilinx
Model	KCU105
Category	Motherboard
Language	English