Xilinx VCU128 User Manual

Table 6: DDR4 Memory 72-bit I/F to FPGA U1 Banks 64, 65, and 66
FPGA (U1) Pin
Schematic Net
Name
I/O Standard
Component Memory
Pin # Pin Name Ref. Des.
BM45 PL_DDR4_DQ0 POD12_DCI A3 DQ8 U74
BP44 PL_DDR4_DQ1 POD12_DCI B8 DQ9 U74
BP47 PL_DDR4_DQ2 POD12_DCI C3 DQ10 U74
BN45 PL_DDR4_DQ3 POD12_DCI C7 DQ11 U74
BM44 PL_DDR4_DQ4 POD12_DCI C2 DQ12 U74
BN44 PL_DDR4_DQ5 POD12_DCI C8 DQ13 U74
BN47 PL_DDR4_DQ6 POD12_DCI D3 DQ14 U74
BP43 PL_DDR4_DQ7 POD12_DCI D7 DQ15 U74
BN46 PL_DDR4_DQS0_T DIFF_POD12_DCI B7 UDQS_T U74
BP46 PL_DDR4_DQS0_C DIFF_POD12_DCI A7 UDQS_C U74
BN42 PL_DDR4_DM0_B POD12_DCI E2 NF/UDM_B/UDBI_B U74
BL45 PL_DDR4_DQ8 POD12_DCI G2 DQ0 U17
BK44 PL_DDR4_DQ9 POD12_DCI F7 DQ1 U17
BL46 PL_DDR4_DQ10 POD12_DCI H3 DQ2 U17
BK43 PL_DDR4_DQ11 POD12_DCI H7 DQ3 U17
BL43 PL_DDR4_DQ12 POD12_DCI H2 DQ4 U17
BJ44 PL_DDR4_DQ13 POD12_DCI H8 DQ5 U17
BL42 PL_DDR4_DQ14 POD12_DCI J3 DQ6 U17
BJ43 PL_DDR4_DQ15 POD12_DCI J7 DQ7 U17
BK45 PL_DDR4_DQS1_T DIFF_POD12_DCI G3 LDQS_T U17
BK46 PL_DDR4_DQS1_C DIFF_POD12_DCI F3 LDQS_C U17
BL47 PL_DDR4_DM1_B POD12_DCI E7 NF/LDM_B/LDBI_B U17
BK41 PL_DDR4_DQ16 POD12_DCI G2 DQ0 U74
BG44 PL_DDR4_DQ17 POD12_DCI F7 DQ1 U74
BG42 PL_DDR4_DQ18 POD12_DCI H3 DQ2 U74
BH44 PL_DDR4_DQ19 POD12_DCI H7 DQ3 U74
BH45 PL_DDR4_DQ20 POD12_DCI H2 DQ4 U74
BG45 PL_DDR4_DQ21 POD12_DCI H8 DQ5 U74
BG43 PL_DDR4_DQ22 POD12_DCI J3 DQ6 U74
BJ41 PL_DDR4_DQ23 POD12_DCI J7 DQ7 U74
BH46 PL_DDR4_DQS2_T DIFF_POD12_DCI G3 LDQS_T U74
BJ46 PL_DDR4_DQS2_C DIFF_POD12_DCI F3 LDQS_C U74
BH42 PL_DDR4_DM2_B POD12_DCI E7 NF/LDM_B/LDBI_B U74
BE43 PL_DDR4_DQ24 POD12_DCI G2 DQ0 U18
BF42 PL_DDR4_DQ25 POD12_DCI F7 DQ1 U18
BC42 PL_DDR4_DQ26 POD12_DCI H3 DQ2 U18
BF43 PL_DDR4_DQ27 POD12_DCI H7 DQ3 U18
BD42 PL_DDR4_DQ28 POD12_DCI H2 DQ4 U18
Chapter 3: Board Component Descriptions
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 21
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Xilinx VCU128 Specifications

General

Brand	Xilinx
Model	VCU128
Category	Motherboard
Language	English