Xilinx VCU128 User Manual

Table 6: DDR4 Memory 72-bit I/F to FPGA U1 Banks 64, 65, and 66 (cont'd)
FPGA (U1) Pin
Schematic Net
Name
I/O Standard
Component Memory
Pin # Pin Name Ref. Des.
BF45 PL_DDR4_DQ29 POD12_DCI H8 DQ5 U18
BE44 PL_DDR4_DQ30 POD12_DCI J3 DQ6 U18
BF46 PL_DDR4_DQ31 POD12_DCI J7 DQ7 U18
BE45 PL_DDR4_DQS3_T DIFF_POD12_DCI G3 LDQS_T U18
BE46 PL_DDR4_DQS3_C DIFF_POD12_DCI F3 LDQS_C U18
BD41 PL_DDR4_DM3_B DIFF_POD12_DCI E7 NF/LDM_B/LDBI_B U18
BP32 PL_DDR4_DQ32 POD12_DCI G2 DQ0 U73
BP29 PL_DDR4_DQ33 POD12_DCI F7 DQ1 U73
BP31 PL_DDR4_DQ34 POD12_DCI H3 DQ2 U73
BP28 PL_DDR4_DQ35 POD12_DCI H7 DQ3 U73
BN32 PL_DDR4_DQ36 POD12_DCI H2 DQ4 U73
BM30 PL_DDR4_DQ37 POD12_DCI H8 DQ5 U73
BN31 PL_DDR4_DQ38 POD12_DCI J3 DQ6 U73
BL30 PL_DDR4_DQ39 POD12_DCI J7 DQ7 U73
BN29 PL_DDR4_DQS4_T DIFF_POD12_DCI G3 LDQS_T U73
BN30 PL_DDR4_DQS4_C DIFF_POD12_DCI F3 LDQS_C U73
BM28 PL_DDR4_DM4_B POD12_DCI E7 NF/LDM_B/LDBI_B U73
BL32 PL_DDR4_DQ40 POD12_DCI G2 DQ0 U19
BP34 PL_DDR4_DQ41 POD12_DCI F7 DQ1 U19
BN34 PL_DDR4_DQ42 POD12_DCI H3 DQ2 U19
BK33 PL_DDR4_DQ43 POD12_DCI H7 DQ3 U19
BL31 PL_DDR4_DQ44 POD12_DCI H2 DQ4 U19
BL33 PL_DDR4_DQ45 POD12_DCI H8 DQ5 U19
BM33 PL_DDR4_DQ46 POD12_DCI J3 DQ6 U19
BK31 PL_DDR4_DQ47 POD12_DCI J7 DQ7 U19
BL35 PL_DDR4_DQS5_T DIFF_POD12_DCI G3 LDQS_T U19
BM35 PL_DDR4_DQS5_C DIFF_POD12_DCI F3 LDQS_C U19
BM34 PL_DDR4_DM5_B POD12_DCI E7 NF/LDM_B/LDBI_B U19
BJ34 PL_DDR4_DQ48 POD12_DCI A3 DQ8 U18
BG35 PL_DDR4_DQ49 POD12_DCI B8 DQ9 U18
BH34 PL_DDR4_DQ50 POD12_DCI C3 DQ10 U18
BH35 PL_DDR4_DQ51 POD12_DCI C7 DQ11 U18
BJ33 PL_DDR4_DQ52 POD12_DCI C2 DQ12 U18
BF35 PL_DDR4_DQ53 POD12_DCI C8 DQ13 U18
BG34 PL_DDR4_DQ54 POD12_DCI D3 DQ14 U18
BF36 PL_DDR4_DQ55 POD12_DCI D7 DQ15 U18
BK34 PL_DDR4_DQS6_T DIFF_POD12_DCI B7 UDQS_T U18
BK35 PL_DDR4_DQS6_C DIFF_POD12_DCI A7 UDQS_C U18
Chapter 3: Board Component Descriptions
UG1302 (v1.0) December 21, 2018 www.xilinx.com
VCU128 Board User Guide 22
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Xilinx VCU128 Specifications

General

Brand	Xilinx
Model	VCU128
Category	Motherboard
Language	English