Xilinx Virtex-7 FPGA VC7222 IBERT User Manual

12 www.xilinx.com VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
Chapter 1: VC7222 IBERT Getting Started Guide
GTH TX/RX Loopback Connections
See Figure 1-2 to identify the P and N coax cables that are connected to the four receivers
(RX0, RX1, RX2, and RX3) and the four transmitters (TX0, TX1, TX2, and TX3). Use eight
SMA female-to-female (F-F) adapters (Figure 1-6) to connect the transmit and receive
cables as shown in Figure 1-7 and detailed in the following list:
•TX0_P→ SMA F-F Adapter → RX0_P
•TX0_N→ SMA F-F Adapter → RX0_N
•TX1_P→ SMA F-F Adapter → RX1_P
•TX1_N→ SMA F-F Adapter → RX1_N
•TX2_P→ SMA F-F Adapter → RX2_P
•TX2_N→ SMA F-F Adapter → RX2_N
•TX3_P→ SMA F-F Adapter → RX3_P
•TX3_N→ SMA F-F Adapter → RX3_N
Note:
To ensure good connectivity, it is recommended that the adapters be secured with a wrench,
however do not over tighten the SMAs.
X-Ref Target - Figure 1-6
Figure 1-6: SMA F-F Adapter
X-Ref Target - Figure 1-7
Figure 1-7: TX-To-RX Loopback Connection Example
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Xilinx Virtex-7 FPGA VC7222 IBERT Specifications

General

Brand	Xilinx
Model	Virtex-7 FPGA VC7222 IBERT
Category	Motherboard
Language	English