Xilinx Virtex-7 FPGA VC7222 IBERT - Page 32

32 www.xilinx.com VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
Chapter 1: VC7222 IBERT Getting Started Guide
To start the SuperClock-2 module:
1. The Vivado Design Suite Hardware window shows the System ACE and the
XC7VH580T device. The XC7VH580T device is reported as programmed when an SD
card is used to program the FPGA during power reset (Figure 1-27). If the SD card is
not available to program the XC7VH580T device, select the device, and in the
Hardware Device Properties window, enter the file path to the programming and the
probes files associated with the Q300 IBERT design. The files are in the extracted
IBERT files:
../vc7222_ibert_q300_225.bit
../vc7222_ibert_q300_debug_nets.ltx
X-Ref Target - Figure 1-27
Figure 1-27: Adding the Probes File
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