Xilinx ZCU111 User Manual

ZCU111 Board User Guide 31
UG1271 (v1.1) August 6, 2018 www.xilinx.com
Chapter 3: Board Component Descriptions
I2C1 (MIO 16-17)
[Figure 2-1, callout 14]
The I2C bus I2C1 connects the RFSoC U1 PS bank 500, PL bank 64, and system controller
U42 to two I2C switches (TCA9548A U26 and U27). These I2C1 connections enable I2C
communications with other I2C capable target devices. TCA9548A U26 is pin-strapped to
respond to I2C address 0x74. TCA9548A U27 is pin-strapped to respond to I2C address
0x75. Figure 3-4 shows a high-level view of the I2C1 bus connectivity represented in
Tab l e 3- 6 and Tab le 3- 7.
Table 3-5: I2C0 Multiplexer PCA9544A U23 Addr. 0x75 Connections
PCA9544A U23
Schematic Net Name
Connected To
Pin
Name
Pin No. Pin No. Pin Name Reference Designator Device
SDA 19 I2C0_SDA
Refer to connections shown in Figure 3-3.
PCA9544A U23 Addr. 0x75
SCL 18 I2C0_SCL
Port Mux'd I2C Bus
0 INA226_PMBUS_SDA/SCL 4/5 SDA/SCL See P17 in Table 3-4 INA226
2 IRPS5401_SDA/SCL 19/18 DATA/CLK U53,U55,U57 IRPS5401
3 SYSMON_SDA/SCL D11/B12 Bank 68 U1
(1)
XCZU28DR
Notes:
1. SYSMON SDA/SCL are level-shifted via U99.
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Xilinx ZCU111 Specifications

General

Brand	Xilinx
Model	ZCU111
Category	Motherboard
Language	English