ZCU111 Board User Guide 90
UG1271 (v1.1) August 6, 2018 www.xilinx.com
Appendix B
Xilinx Design Constraints
Overview
The Xilinx design constraints (XDC) file template for the ZCU111 board provides for designs
targeting the ZCU111 evaluation board. Net names in the constraints listed correlate with
net names on the latest ZCU111 evaluation board schematic. Identify the appropriate pins
and replace the net names with net names in the user RTL. See the Vivado Design Suite User
Guide: Using Constraints (UG903) [Ref 8] for more information.
The HSPC FMCP connector J26 is connected to RFSoC banks powered by the variable
voltage V
AJ_FMC
. Because different FMC cards implement different circuitry, the FMC bank
I/O standards must be uniquely defined by each customer.
IMPORTANT: See ZCU111 board documentation for the XDC file.
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