ZiLOG System 8000 Hardware Reference Manual

HRM
Zilog
HRM
interface signals between the two boards are cabled on a
flat 40 pin cable to the front of both boards. All drive
connections are made by cabling backplane connectors to the
SMD A and SMD B I/O connectors on the processor SMDC I/O
panel and from the I/O panel to the SMDC A and SMDC B inputs
on the Disk/Tape Module. Figure 4-6 shows the SMDC A and
SMDC B Functional Relationships. The SMDC A ZBI connection
is through P1/J16. All data transfers and input/output
addresses are 16 bits. All data addresses are 24 bits. The
interrupt vector is programmable, by the host CPU.
110 PLATE
CONTROL
CABLE
DRIVE 1
LOCAL INTERFACE
SMDCA
;A ZBI BUS
~r------------,
SMDC B
00380
4-27
Figure 4-6 storage Module Device Controller
Functional Relationship
Zilog
4-27

ZiLOG System 8000 Specifications

General

Brand	ZiLOG
Model	System 8000
Category	Desktop
Language	English