ZiLOG System 8000 Hardware Reference Manual

HRM Zilog
HRM
4.5.3.1 Command Packet Cont"rol: Commands are sent to the
controller in the form of 32-byte packets that describe the
operation to be performed. At any given time, the controller
may be executing one command packet for each SMD. Upon com-
pletion of the command, the packet is written back into main
memory and the appropriate status registers are updated. The
controller maintains a separate packet address for each SMD.
Most commands are sent to the SMDC in a packet of 32 bytes.
However, certain information, such as packet address and
interrupt controls, is communicated by one 16-bit write-only
command and one 16-bit read-only status register that share
a common address.
Command Register
7
6
5
4
3
2 1 0
DTA : INIT : RI I DI : EI I WK : CMD
NAME
CR:CMD
CR:WK
CR:EI
CR:DI
CR:HI
CR:INIT
CR:DTA
BITS
0-2
3
4
5
6
7
8-15
FUNCTION
COMMAND
o - nap
1 read packet addresses from DT
2 reserved
3 reserved
4 dispatch table address byte 0 (lsb)
5 dispatch table address byte 1
6 dispatch table address byte 2 (rnsb)
7 interrupt vector
wakeup
enable interrupts (reset by IUS)
disable interrupts
reset IP and IUS
initialize controller
dispatch table address byte
or interrupt vector
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Zilog
4-28

ZiLOG System 8000 Specifications

General

Brand	ZiLOG
Model	System 8000
Category	Desktop
Language	English