Configurable logic blocks......................................................................848
Application
....................................................................................... 848
Setting guidelines
............................................................................ 848
Configuration.............................................................................. 849
Fixed signal function block FXDSIGN...................................................850
Identification.................................................................................... 850
Application....................................................................................... 850
Boolean 16 to Integer conversion B16I.................................................851
Identification.................................................................................... 851
Application....................................................................................... 852
Boolean to integer conversion with logical node representation, 16
bit BTIGAPC......................................................................................... 853
Identification.................................................................................... 853
Application....................................................................................... 853
Integer to Boolean 16 conversion IB16.................................................854
Identification.................................................................................... 854
Application....................................................................................... 854
Integer to Boolean 16 conversion with logic node representation
ITBGAPC.............................................................................................. 855
Identification.................................................................................... 856
Application....................................................................................... 856
Elapsed time integrator with limit transgression and overflow
supervision TEIGAPC...........................................................................857
Identification.................................................................................... 857
Application....................................................................................... 857
Setting guidelines............................................................................ 857
Comparator for integer inputs - INTCOMP........................................... 858
Identification.................................................................................... 858
Application....................................................................................... 858
Setting guidelines............................................................................ 858
Setting example...............................................................................859
Comparator for real inputs - REALCOMP.............................................860
Identification.................................................................................... 860
Application....................................................................................... 860
Setting guidelines............................................................................ 860
Setting example...............................................................................861
Section 18 Monitoring..........................................................................863
Measurement........................................................................................863
Identification.................................................................................... 863
Application....................................................................................... 864
Table of contents
Transformer protection RET670 2.2 ANSI 21
Application manual