EasyManua.ls Logo

Advantech AIMB-781 - B.23 System I;O Ports; Table B.23:System I;O Ports; B.24 DMA Channel Assignments; Table B.24:DMA Channel Assignments

Advantech AIMB-781
100 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
87 AIMB-781 User Manual
Appendix B I/O Pin Assignments
B.23 System I/O Ports
B.24 DMA Channel Assignments
Table B.23: System I/O ports
Addr. range (Hex) Device
000-01F DMA controller
020-021 Interrupt controller 1, master
022-023 Chipset address
040-05F 8254 timer
060-06F 8042 (keyboard controller)
070-07F Real-time clock, non-maskable interrupt (NMI) mask
080-09F DMA page register
0A0-0BF Interrupt controller 2
0C0-0DF DMA controller
0F0 Clear math co-processor
0F1 Reset math co-processor
0F8-0FF Math co-processor
1F0-1F8 Fixed disk
290-297 On-board hardware monitor
2F8-2FF Serial port 2
300-31F Prototype card
360-36F Reserved
380-38F SDLC, bisynchronous 2
3A0-3AF Bisynchronous 1
3B0-3BF Monochrome display and printer adapter (LPT1)
3C0-3CF Reserved
3D0-3DF Color/graphics monitor adapter
3F0-3F7 Diskette controller
3F8-3FF Serial port 1
Table B.24: DMA channel assignments
Channel Function
0 Available
1 Available
2 Available
3 Available
4 Cascade for DMA controller 1
5 Available
6 Available
7 Available

Table of Contents

Related product manuals