6 Language Dictionary
102 Series N6700 User’s Guide
*SRE
*SRE?
This command sets the value of the Service Request Enable Register.
This register determines which bits from the Status Byte Register are
summed to set the Master Status Summary (MSS) bit and the Request
for Service (RQS) summary bit. A 1 in any Service Request Enable
Register bit position enables the corresponding Status Byte Register
bit. All such enabled bits are then logically ORed to cause the MSS bit
(bit 6) of the Status Byte Register to be set.
When the controller conducts a serial poll in response to SRQ, the
RQS bit is cleared, but the MSS bit is not. When *SRE is cleared (by
programming it with 0), the power system cannot generate an SRQ to
the controller. The query returns the current state of *SRE.
*STB?
This query reads the Status Byte register, which contains the status
summary bits and the Output Queue MAV bit. Reading the Status
Byte register does not clear it. The input summary bits are cleared
when the appropriate event registers are read. The MAV bit is cleared
at power-on, by *CLS, or when there is no more response data
available.
A serial poll also returns the value of the Status Byte register, except
that bit 6 returns Request for Service (RQS) instead of Master Status
Summary (MSS). A serial poll clears RQS, but not MSS. When MSS is
set, it indicates that the power system has one or more reasons for
requesting service.
Bit Position 7 6 5 4 3 2
1 − 0
Bit Value 128 64 32 16 8 4
−
Bit Name OPER MSS
(RQS)
ESB MAV QUES ERR
−
OPER = Operation status summary
MSS = Master status summary
(RQS) = Request for service
ESB = Event status byte summary
MAV = Message available
QUES = Questionable status summary
ERR = Error queue not empty
*WAI
This command instructs the power system not to process any further
commands until all pending operations are completed. Pending
operations are as defined under the *OPC command. *WAI can be
aborted only by sending the power system a Device Clear command.
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