Alinx ARTIX-7 - Page 14

ARTIX-7 FPGA Development Board AX7101 User Manual
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output is connected to the GTP BANK216 clock pins MGTREFCLK0P (F6) and
MGTREFCLK0N (E6) of the FPGA.
Figure 2-3-3: 125Mhz Active Differential Crystal Schematic
Figure 2-3-4: 125Mhz Active Differential Crystal on the Core Board
125Mhz Differential Clock Pin Assignment
Net Name
FPGA PIN
MGT_CLK0_P
F6
MGT_CLK0_N
E6