Alinx ARTIX-7 - Part 2.5: QSPI Flash

ARTIX-7 FPGA Development Board AX7101 User Manual
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DDR3_DQ [4]
IO_L2N_T0_AD12N_35
B2
DDR3_DQ [5]
IO_L5N_T0_AD13N_35
F1
DDR3_DQ [6]
IO_L1P_T0_AD4P_35
B1
DDR3_DQ [7]
IO_L4P_T0_35
E2
DDR3_DQ [8]
IO_L11P_T1_SRCC_35
H3
DDR3_DQ [9]
IO_L11N_T1_SRCC_35
G3
DDR3_DQ [10]
IO_L8P_T1_AD14P_35
H2
DDR3_DQ [11]
IO_L10N_T1_AD15N_35
H5
DDR3_DQ [12]
IO_L7N_T1_AD6N_35
J1
DDR3_DQ [13]
IO_L10P_T1_AD15P_35
J5
DDR3_DQ [14]
IO_L7P_T1_AD6P_35
K1
DDR3_DQ [15]
IO_L12P_T1_MRCC_35
H4
DDR3_DQ [16]
IO_L18N_T2_35
L4
DDR3_DQ [17]
IO_L16P_T2_35
M3
DDR3_DQ [18]
IO_L14P_T2_SRCC_35
L3
DDR3_DQ [19]
IO_L17N_T2_35
J6
DDR3_DQ [20]
IO_L14N_T2_SRCC_35
K3
DDR3_DQ [21]
IO_L17P_T2_35
K6
Part 2.5: QSPI Flash
The FPGA core board AC7100B is equipped with one 128MBit QSPI
FLASH, and the model is N25Q128, which uses the 3.3V CMOS voltage
standard. Due to the non-volatile nature of QSPI FLASH, it can be used as a
boot device for the system to store the boot image of the system. These
images mainly include FPGA bit files, ARM application code, core application
code and other user data files. The specific models and related parameters of
QSPI FLASH are shown in Table 2-5-1.
Position
Model
Capacity
Factory
U8
N25Q128
128M Bit
Numonyx
Table 2-5-1: QSPI FLASH Specification
QSPI FLASH is connected to the dedicated pins of BANK0 and BANK14 of