Alinx AXKU040 - Page 13

KINTEX UltraScale+ FPGA Board AXKU040 User Manual
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PL_DDR4_DM6
IO_L13P_T2L_N0_GC_QBC_46
AJ29
PL_DDR4_DM7
IO_L19P_T3L_N0_DBC_AD9P_46
AL32
PL_DDR4_DQS0_P
IO_L4P_T0U_N6_DBC_AD7P_44
AG21
PL_DDR4_DQS0_N
IO_L4N_T0U_N7_DBC_AD7N_44
AH21
PL_DDR4_DQS1_P
IO_L10P_T1U_N6_QBC_AD4P_44
AH24
PL_DDR4_DQS1_N
IO_L10N_T1U_N7_QBC_AD4N_44
AJ25
PL_DDR4_DQS2_P
IO_L16P_T2U_N6_QBC_AD3P_44
AJ20
PL_DDR4_DQS2_N
IO_L16N_T2U_N7_QBC_AD3N_44
AK20
PL_DDR4_DQS3_P
IO_L22P_T3U_N6_DBC_AD0P_44
AP20
PL_DDR4_DQS3_N
IO_L22N_T3U_N7_DBC_AD0N_44
AP21
PL_DDR4_DQS4_P
IO_L4P_T0U_N6_DBC_AD7P_46
AL27
PL_DDR4_DQS4_N
IO_L4N_T0U_N7_DBC_AD7N_46
AL28
PL_DDR4_DQS5_P
IO_L10P_T1U_N6_QBC_AD4P_46
AN29
PL_DDR4_DQS5_N
IO_L10N_T1U_N7_QBC_AD4N_46
AP30
PL_DDR4_DQS6_P
IO_L16P_T2U_N6_QBC_AD3P_46
AH33
PL_DDR4_DQS6_N
IO_L16N_T2U_N7_QBC_AD3N_46
AJ33
PL_DDR4_DQS7_P
IO_L22P_T3U_N6_DBC_AD0P_46
AN34
PL_DDR4_DQS7_N
IO_L22N_T3U_N7_DBC_AD0N_46
AP34
PL_DDR4_A0
IO_L18N_T2U_N11_AD2N_45
AG14
PL_DDR4_A1
IO_L23N_T3U_N9_45
AF17
PL_DDR4_A2
IO_L20P_T3L_N2_AD1P_45
AF15
PL_DDR4_A3
IO_L16N_T2U_N7_QBC_AD3N_45
AJ14
PL_DDR4_A4
IO_L19N_T3L_N1_DBC_AD9N_45
AD18
PL_DDR4_A5
IO_L15P_T2L_N4_AD11P_45
AG17
PL_DDR4_A6
IO_L23P_T3U_N8_45
AE17
PL_DDR4_A7
IO_L11N_T1U_N9_GC_45
AK18
PL_DDR4_A8
IO_L24P_T3U_N10_45
AD16
PL_DDR4_A9
IO_L13P_T2L_N0_GC_QBC_45
AH18
PL_DDR4_A10
IO_L19P_T3L_N0_DBC_AD9P_45
AD19
PL_DDR4_A11
IO_L24N_T3U_N11_45
AD15
PL_DDR4_A12
IO_L14P_T2L_N2_GC_45
AH16
PL_DDR4_A13
IO_L10N_T1U_N7_QBC_AD4N_45
AL17
PL_DDR4_BA0
IO_L18P_T2U_N10_AD2P_45
AG15
PL_DDR4_BA1
IO_L10P_T1U_N6_QBC_AD4P_45
AL18
PL_DDR4_BG0
IO_L16P_T2U_N6_QBC_AD3P_45
AJ15
PL_DDR4_WE_B
IO_L9N_T1L_N5_AD12N_45
AL15