Theory of Operation Sorensen DCS Series 1kW and 1.2kW Supplies
3-4 M362500-01 Rev K
INPUT RECTIFIER AND INRUSH LIMITING
Input AC power passes from the rear panel AC connector (TB1) through an RFI filter consisting
of C1-6, R122, and common mode filter inductors L1, and L2 to the front panel power switch.
Both input lines are switched with one line (the neutral line of a 115Vac input) returning to the
A2 PCB and the input bridge rectifier CR35 via fuse F1. The other input line (the hot line of a
115Vac input) is connected to the remaining input of rectifier CR35 via front panel circuit
breaker CB1, relay K1 and the inrush limiter formed by parallel resistors R116, R116A and fuse
F2. Resistors R116, R116A limit the power-on inrush current to the main filter capacitors
C32(A,B,C) and C72(A,B,C) until it is shorted by K1 relay contacts. The time delay for K1
contact closure is determined by the time constant formed by capacitor C12, resistor R118 and
the gate threshold of FET Q6. Diode CR33 keeps the PWM shutdown input high until the relay
closes. Diode CR38 discharges C12 when the 12V auxiliary supply collapses and CR39
provides an inductive kickback path for the relay coil. During the inrush period, diode CR33
holds the PWM shutdown line high, disabling the power supply output until Q6 turns on.
Resistors R114 and R115 are bleeder resistors for the main filter capacitors. The rectified high
voltage dc from CR35 is supplied to the main switching FETs Q13-Q16 on the primary of the
power transformer T1 via fuse F3.
For 230Vac operation, rectifier CR35 and filter capacitors C32(A,B,C) and C72(A,B,C) are
configured as a full wave bridge. For 115Vac operation the input voltage selector P1 is
configured so that CR35, C32(A,B,C) and C72(A,B,C) form a voltage doubler. In this manner,
the rectified DC voltage is always within the range of 225-350VDC with either a 115 or 230Vac
input voltage. In addition to determining the input rectifier configuration, P1 also configures the
connections to the primary of auxiliary transformer T4 for series or parallel operation.
PULSE WIDTH MODULATOR
Pulse width modulator U6 is a current mode controller that drives the main switching FETs
Q13-Q16 through a driver circuit consisting of FETs Q7-Q12, Q18 and Q19 and FET gate drive
transformer T2. Capacitor C69 and resistors R111-R113 form a snubber on the primary of
transformer T1 limiting switching transients. Transformer T3 is used to monitor the primary
current in T1 and provide a feedback signal for the peak current sense amplifier of U6. Diodes
CR29 and CR30 rectify T3 output while resistor R95 and C64A provide a burden impedance to
T3 and filter the switching spikes. Resistors R96, R97 and capacitors C60-C62 and C97 scale
and condition the signal before it is applied to the input of the PWM IC at U6-4. Transistor Q20
is connected to the ramp generator at U6-8 through R66 to provide slope compensation to the
current feedback signal to allow for stable operation at light loads. An internal comparator
compares the output of the current sense amplifier with a limited error signal derived from the
output voltage and current control circuits. The output of the PWM comparator controls the
pulse duration of the drive signals from pins 11 and 14 of the PWM thereby controlling the
primary current in T1 and the output power. Resistor R100 and capacitor C63 set the internal
oscillator of U6 to approximately 140kHz, resulting in an approximate 70kHz output switching
frequency. A 5.1V reference developed at pin 2 of U6 is divided down by resistors R64 and R67
to provide a reference at the non–inverting input of the error amplifier at U6-5. The 5.1V
reference voltage is also divided by resistors R65 and R68 to provide a reference at pin 1 of the
PWM which limits the swing of the error amplifier output placing an upper limit on the primary
current in transformer T1. Resistors R413 and R102 form a divider to limit the voltage to
shutdown pin 16 of U6 to turn the PWM off during startup, shutdown or OVP or over
temperature conditions.
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