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ARM DSTREAM-ST - Reset signals

ARM DSTREAM-ST
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Chapter 2
ARM
®
DSTREAM-ST target interface connections
This chapter describes the target connector pinouts and their interface signals available on the ARM
DSTREAM-ST unit.
It contains the following sections:
2.1 About the ARM
®
JTAG 20 connector pinouts and interface signals on page 2-20.
2.2 About the CoreSight
20 connector pinouts and interface signals on page 2-22.
2.3 About Serial Wire Debug (SWD) on page 2-25.
2.4 About trace signals on page 2-27.
2.5 About JTAG port timing characteristics on page 2-28.
2.6 About JTAG port buffering on page 2-30.
2.7 I/O diagrams for the DSTREAM-ST connectors on page 2-34.
2.8 Voltage domains of the DSTREAM-ST unit on page 2-36.
2.9 Series termination on page 2-37.
ARM 100893_0100_00_en Copyright © 2017 ARM Limited or its affiliates. All rights reserved. 2-19
Non-Confidential

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