5.1 About adaptive clocking to synchronize the JTAG port
ARM architecture-based devices that use only hard macrocells, such as ARM7TDMI and ARM920T, use
the standard five-wire JTAG interface. However, some target systems require that JTAG events are
synchronized to a clock in the system. The adaptive clocking feature of DSTREAM-ST addresses this
requirement.
The standard five-wire JTAG interface comprises the TCK, TMS, TDI, TDO, and nTRST signals. To
ensure a valid JTAG CLK setting, systems that require the JTAG events to be synchronized to a clock in
the system often supports an extra signal (RTCK) at the JTAG port:
• An Application-Specific Integrated Circuit (ASIC) with single rising-edge D-type design rules, such
as one based on an ARM7TDMI-S processor.
• A system where scan chains external to the ARM macrocell must meet single rising-edge D-type
design rules.
When adaptive clocking is enabled, DSTREAM-ST issues a TCK signal and waits for the RTCK signal
to come back. DSTREAM-ST does not progress to the next TCK until RTCK is received.
Note
• Adaptive clocking is automatically configured in ARM DS-5 as required by the target.
• If you use the adaptive clocking feature, transmission delays, gate delays, and synchronization
requirements result in a lower maximum clock frequency than with non-adaptive clocking. Do not
use adaptive clocking unless the hardware design requires it.
• When autoconfiguring a target, if the DSTREAM-ST unit receives pulses on RTCK in response to
TCK it assumes that adaptive clocking is required, and enables adaptive clocking in the target
configuration. If the hardware does not require adaptive clocking, the target is driven slower than it
could be. You can disable adaptive clocking using controls on the JTAG settings dialog box.
• If adaptive clocking is used, DSTREAM-ST cannot detect the clock speed, and therefore cannot scale
its internal timeouts. If the target clock frequency is very slow, a JTAG timeout might occur. This
leaves the JTAG in an unknown state, and DSTREAM-ST cannot operate correctly without
reconnecting to the processor. JTAG timeouts are enabled by default. You can disable JTAG timeouts
by deselecting the JTAG Timeouts Enabled option in the host-side debug tools.
You can use adaptive clocking as an interface to targets with slow or widely varying clock frequency,
such as battery-powered equipment that varies its clock speed according to processing demand. In this
system, TCK might be hundreds of times faster than the system clock, and the debugger loses
synchronization with the target system. Adaptive clocking ensures that the JTAG port speed
automatically adapts to slow system speed.
The following figure shows a circuit for a basic JTAG port synchronizer.
5 Reference
5.1 About adaptive clocking to synchronize the JTAG port
ARM 100893_0100_00_en Copyright © 2017 ARM Limited or its affiliates. All rights reserved. 5-47
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