ARM DSTREAM-ST - CoreSight 10 connector

Diagram F - VTRef input
The VTRef input circuit diagram is shown in the following figure:
33R
-
-
-
10K
~0.6V
Target detect
Buffered VTREF
-
-
-
Figure 2-17 VTRef input
Diagram G - VTRef input (decoupled)
The VTRef input (decoupled) circuit diagram is shown in the following figure:
33R
-
-
-
~0.6V
Target detect
Buffered VTREF
-
-
-
10K
100nF
Figure 2-18 VTRef input (decoupled)
Diagram H - AC Ground
The AC Ground circuit diagram is shown in the following figure:
100nF
Figure 2-19 AC Ground
2 ARM
®
DSTREAM-ST target interface connections
2.7 I/O diagrams for the DSTREAM-ST connectors
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