ARM
Processor/ASIC
JTAG
CONNECTOR
ARM
Processor/ASIC
TDI
TMS
TCK
TDO
TDI
TMS
TCK
TDO
Figure 2-9 Daisy-chained JTAG connection without buffers
Achieving good signal integrity becomes difficult in this scenario due to the TMS and TCK signals
being split several ways at T-junctions. The signal integrity of the TMS signal is not critical since it is
ignored by the target device until a rising edge of TCK signal is detected. The signal integrity of the
TCK signal is very critical, since any false edges cause the target device to sample TDI and TMS
signals too many times, thereby corrupting the serial data stream as seen by the target devices.
To avoid this issue, buffering should always be used where the TCK signal is split:
2 ARM
®
DSTREAM-ST target interface connections
2.6 About JTAG port buffering
ARM 100893_0100_00_en Copyright © 2017 ARM Limited or its affiliates. All rights reserved. 2-31
Non-Confidential
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