ARM DSTREAM-ST - Typical SWD circuit

2.6 About JTAG port buffering
JTAG buffering is sometimes required on the target board to improve signal integrity and increase the
usable bandwidth of the interface. This can be achieved using common off-the-shelf parts at very little
cost.
In most cases, the JTAG connector of a target system connects to a single device, for example:
Note
Pull-up and pull-down resistors are omitted for clarity.
JTAG
CONNECTOR
ARM
Processor/ASIC
TDI
TMS
TCK
TDO
Figure 2-7 JTAG connection without buffers
A resistor must be placed close to the TDO pin of target device to act as a series terminator. This is the
simplest scenario, and it is easy to achieve good signal integrity since each signal is point-to-point.
But, if the TDO output of the target device has a very weak drive-strength (<4mA), this could
significantly limit the maximum frequency of the JTAG interface. You can resolve this by placing a
buffer close to the TDO pin of the target device with the appropriate series termination resistor:
JTAG
CONNECTOR
ARM
Processor/ASIC
TDI
TMS
TCK
TDO
Figure 2-8 JTAG connection with TDO buffer
Sometimes, two or more devices are daisy-chained together in the target system:
2 ARM
®
DSTREAM-ST target interface connections
2.6 About JTAG port buffering
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