ARM
Processor/ASIC
JTAG
CONNECTOR
ARM
Processor/ASIC
TDI
TMS
TCK
TDO
TDI
TMS
TCK
TDO
Figure 2-10 Daisy-chained JTAG connection with TCK buffers
This solution prevents the two TCK branches from interacting and ensures good signal integrity with
minimal overshoot. The buffers and series termination resistors should be placed as close as possible to
the T-junction of the TCK signal.
The only disadvantage to this solution is that it causes some skew between the TDI/TMS and TCK
signals. It might be beneficial to use the same type of buffers on the TDI and TMS signals as on the
TCK signals, for example:
2 ARM
®
DSTREAM-ST target interface connections
2.6 About JTAG port buffering
ARM 100893_0100_00_en Copyright © 2017 ARM Limited or its affiliates. All rights reserved. 2-32
Non-Confidential
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