16
8025I–AVR–02/09
ATmega48P/88P/168P/328P
5. AVR Memories
5.1 Overview
This section describes the different memories in the ATmega48P/88P/168P/328P. The AVR
architecture has two main memory spaces, the Data Memory and the Program Memory space.
In addition, the ATmega48P/88P/168P/328P features an EEPROM Memory for data storage. All
three memory spaces are linear and regular.
5.2 In-System Reprogrammable Flash Program Memory
The ATmega48P/88P/168P/328P contains 4/8/16/32K bytes On-chip In-System Reprogramma-
ble Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the
Flash is organized as 2/4/8/16K x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Loader Section and Application Program Section in ATmega88P
and ATmega168P. ATmega48P does not have separate Boot Loader and Application Program
sections, and the SPM instruction can be executed from the entire Flash. See SELFPRGEN
description in section ”SPMCSR – Store Program Memory Control and Status Register” on page
275 and page 292for more details.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48P/88P/168P/328P Program Counter (PC) is 11/12/13/14 bits wide, thus addressing
the 2/4/8/16K program memory locations. The operation of Boot Program section and associ-
ated Boot Lock bits for software protection are described in detail in ”Self-Programming the
Flash, ATmega48P” on page 269 and ”Boot Loader Support – Read-While-Write Self-Program-
ming, ATmega88P, ATmega168P and ATmega328P” on page 277. ”Memory Programming” on
page 294 contains a detailed description on Flash Programming in SPI- or Parallel Programming
mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in ”Instruction Execution Tim-
ing” on page 13.
To Next Page
Loading...
Need help?
General
