191
7598H–AVR–07/09
ATtiny25/45/85
30. Table of Contents
Features ..................................................................................................... 1
1 Pin Configurations ................................................................................... 2
2 Overview ................................................................................................... 2
2.1 Block Diagram ...................................................................................................3
2.2 Automotive Quality Grade .................................................................................4
2.3 Pin Descriptions .................................................................................................5
3 About Code Examples ............................................................................. 5
4 AVR CPU Core .......................................................................................... 5
4.1 Introduction ........................................................................................................5
4.2 Architectural Overview .......................................................................................6
4.3 ALU – Arithmetic Logic Unit ...............................................................................7
4.4 Status Register ..................................................................................................7
4.5 General Purpose Register File ..........................................................................9
4.6 Stack Pointer ...................................................................................................10
4.7 Instruction Execution Timing ...........................................................................11
4.8 Reset and Interrupt Handling ...........................................................................11
5 AVR ATtiny25/45/85 Memories ............................................................. 13
5.1 In-System Re-programmable Flash Program Memory ....................................13
5.2 SRAM Data Memory ........................................................................................14
5.3 EEPROM Data Memory ..................................................................................15
5.4 I/O Memory ......................................................................................................21
6 System Clock and Clock Options ......................................................... 21
6.1 Clock Systems and their Distribution ...............................................................21
6.2 Clock Sources .................................................................................................23
6.3 Default Clock Source .......................................................................................24
6.4 Crystal Oscillator .............................................................................................24
6.5 Low-frequency Crystal Oscillator .....................................................................25
6.6 Calibrated Internal RC Oscillator .....................................................................26
6.7 External Clock .................................................................................................27
6.8 128 kHz Internal Oscillator ..............................................................................28
6.9 Clock Output Buffer .........................................................................................29
6.10 System Clock Prescaler ..................................................................................29
To Next Page
Loading...
Need help?
General
