Atmel AVR AT90CAN32

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156

7679H–CAN–08/08

AT90CAN32/64/128

Figure 14-11. Timer/Counter Timing Diagram, Setting of OCF2A, with Prescaler (f

clk_I/O

/8)

OCFnx

OCRnx

TCNTn

OCRnx Value

OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2

clk

I/O

clk

(clk

I/O

/8)

Main Page

Part Description2
Block Diagram4
Pin Configurations5
Pin Descriptions6
About Code Examples8
AVR CPU Core9
Architectural Overview9
ALU - Arithmetic Logic Unit10
Status Register11
General Purpose Register File12
Stack Pointer14
Instruction Execution Timing14
Reset and Interrupt Handling15
SRAM Data Memory19
Data Memory21
EEPROM Data Memory22
External Memory Interface27
General Purpose I/O Registers36
Clock Systems and Their Distribution37
Default Clock Source38
Crystal Oscillator39
Low-Frequency Crystal Oscillator40
Calibrated Internal RC Oscillator41
External Clock42
Clock Output Buffer43
System Clock Prescaler44
Power Management and Sleep Modes46
Idle Mode47
ADC Noise Reduction Mode47
Power down Mode47
Power Save Mode47
Standby Mode48
Minimizing Power Consumption48
System Control and Reset51
Internal Voltage Reference56
Watchdog Timer57
Timed Sequences for Changing the Configuration of the Watchdog Timer59
Moving Interrupts between Application and Boot Space64
Ports as General Digital I/O67
Alternate Port Functions71
External Interrupts93
Timer/Counter Clock Sources100
Counter Unit100
Output Compare Unit101
Compare Match Output Unit103
Modes of Operation104
Timer/Counter Timing Diagrams108
8-Bit Timer/Counter Register Description109
Accessing 16-Bit Registers116
C Code Example118
Timer/Counter Clock Sources119
Counter Unit120
Input Capture Unit121
Output Compare Units123
Compare Match Output Unit125
Modes of Operation126
Timer/Counter Timing Diagrams134
Serial Peripheral Interface (Spi)168
SS Pin Functionality172
Data Modes175
Dual USART177
Clock Generation179
USART Initialization182
Asynchronous Data Reception190
Multi-Processor Communication Mode193
USART Register Description195
Examples of Baud Rate Setting200
Two-Wire Serial Interface204
Two-Wire Serial Interface Bus Definition204
Data Transfer and Frame Format205
Multi-Master Bus Systems, Arbitration and Synchronization207
Overview of the TWI Module209
TWI Register Description212
Using the TWI215
Transmission Modes218
Slave Receiver Mode224
Multi-Master Systems and Arbitration232
Controller Area Network - CAN234
CAN Protocol234
Message Formats235
CAN Controller240
CAN Channel241
Bit Timing242
Message Objects243
Error Management248
Analog Comparator Register Description269
Analog Comparator Multiplexed Input271
Analog to Digital Converter - ADC273
Operation274
Starting a Conversion275
Prescaling and Conversion Timing276
Changing Channel or Reference Selection279
ADC Noise Canceler280
ADC Conversion Result284
ADC Register Description287
JTAG Interface and On-Chip Debug System293
Test Access Port - TAP293
TAP Controller296
Using the Boundary-Scan Chain297
Using the On-Chip Debug System297
On-Chip Debug Specific JTAG Instructions298
On-Chip Debug Related Register in I/O Memory299
Using the JTAG Programming Capabilities299
System Overview300
Data Registers300
Boundary-Scan Specific JTAG Instructions302
Boundary-Scan Related Register in I/O Memory304
Boundary-Scan Chain304
Scanning the ADC310
Boundary-Scan Description Language Files320
Boot Loader Support - Read-While-Write Self-Programming321
Application and Boot Loader Flash Sections321
Read-While-Write and no Read-While-Write Flash Sections321
Boot Loader Lock Bits324
Entering the Boot Loader Program325
Addressing the Flash During Self-Programming327
Self-Programming the Flash328
Simple Assembly Code Example for a Boot Loader332
Memory Programming336
Program and Data Memory Lock Bits336
Signature Bytes339
Calibration Byte339
Parallel Programming342
Electrical Characteristics365
Absolute Maximum Ratings365
Maximum Speed368
Two-Wire Serial Interface Characteristics369
SPI Timing Characteristics370
ADC Characteristics373
Parallel Programming Characteristics380
Timing Requirements381
Decoupling Capacitors383
Active Supply Current384
Idle Supply Current387
Power-Down Supply Current389
Power-Save Supply Current390
Standby Supply Current391
Pin Driver Strength393
Pin Thresholds and Hysteresis395
BOD Thresholds and Analog Comparator Offset397
Internal Oscillator Speed399
Current Consumption of Peripheral Units401
Current Consumption in Reset and Reset Pulse Width403
Register Summary405
Instruction Set Summary409
Ordering Information412
Packaging Information412
Errata Summary416
Document Creation420

Atmel AVR AT90CAN32 - Page 156

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