19
7679H–CAN–08/08
AT90CAN32/64/128
Constant tables can be allocated within the entire program memory address space (see the
LPM – Load Program Memory and ELPM – Extended Load Program Memory instruction
description).
Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-
ing” on page 14.
Figure 4-1. Program Memory Map
4.2 SRAM Data Memory
Figure 4-2 shows how the AT90CAN32/64/128 SRAM Memory is organized.
The AT90CAN32/64/128 is a complex microcontroller with more peripheral units than can be
supported within the 64 locations reserved in the Opcode for the IN and OUT instructions. For
the Extended I/O space in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be
used.
The lower data memory locations address both the Register File, the I/O memory, Extended I/O
memory, and the internal data SRAM. The first 32 locations address the Register File, the next
64 location the standard I/O memory, then 160 locations of Extended I/O memory, and the next
locations address the internal data SRAM (see “ISRAM size”).
An optional external data SRAM can be used with the AT90CAN32/64/128. This SRAM will
occupy an area in the remaining address locations in the 64K address space. This area starts at
the address following the internal SRAM. The Register file, I/O, Extended I/O and Internal SRAM
occupies the lowest bytes, so when using 64 KB (65,536 bytes) of External Memory,
“XMem size” bytes of External Memory are available. See “External Memory Interface” on page
27 for details on how to take advantage of the external memory map.
0x0000
Flash end
Program Memory
Application Flash Section
Boot Flash Section
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