Caen DT5730 - List of Figures; List of Tables

CAEN
Electronic Instrumentation
UM3148 – DT5730/DT5725 User Manual rev. 2
5
CAENUpgrader .................................................................................................................................. 46
CAENComm Demo ........................................................................................................................... 47
CAEN WAVEDump ........................................................................................................................... 48
CAENScope ....................................................................................................................................... 49
DPP-PSD Control Software ............................................................................................................. 50
MC²Analyzer (MC²A) ......................................................................................................................... 51
12 HW Installation.............................................................................................................. 52
Power-on Sequence .......................................................................................................................... 52
Power-on Status ................................................................................................................................ 52
13 Firmware and Upgrades .............................................................................................. 53
Default Firmware Upgrade ............................................................................................................... 54
Upgrade Files Description ......................................................................................................................... 54
DPP Firmware Upgrade .............................................................................................................................. 54
Upgrade File Description ...............................................................................................................................................54
14 Technical Support ........................................................................................................ 55
Returns and Repairs ......................................................................................................................... 55
Technical Support Service ............................................................................................................... 55
List of Figures
Fig. 2.1: Block Diagram ........................................................................................................................................................................8
Fig. 4.1: Front view .............................................................................................................................................................................10
Fig. 5.1: AC/DC power supply provided with the module ..............................................................................................................11
Fig. 8.1: Front panel view ..................................................................................................................................................................14
Fig. 8.2: Rear panel view ...................................................................................................................................................................14
Fig. 9.1: Analog Input Diagram .........................................................................................................................................................19
Fig. 9.2: Clock Distribution Diagram .................................................................................................................................................20
Fig. 9.3: Typical channel before the calibration (A and B) and after the calibration (C) ...........................................................22
Fig. 9.4: Automatic calibration at WaveDump first run ..................................................................................................................24
Fig. 9.5: Temperature monitoring with manual calibration in WaveDump software ..................................................................24
Fig. 9.6: Channel calibration in DPP-PSD Control Software ........................................................................................................25
Fig. 9.7: Channel calibration in MC
2
Analyzer software .................................................................................................................25
Fig. 9.8: Trigger overlap .....................................................................................................................................................................27
Fig. 9.9: Block Diagram of the trigger management ......................................................................................................................32
Fig. 9.10: Self Trigger and Trigger Request logic for Ch0 and Ch1 couple. A single trigger request signal is generated...33
Fig. 9.11: Channel over/under threshold signal ..............................................................................................................................33
Fig. 9.12: Channel pulse signal ........................................................................................................................................................34
Fig. 9.13: Trigger request management at mezzanine level with Majority level = 0 .................................................................36
Fig. 9.14: Trigger request management at motherboard level with Majority level = 0 ..............................................................36
Fig. 9.15: Trigger request relationship with Majority level = 1 and T
TVAW
≠ 0 .............................................................................37
Fig. 9.16: Trigger request relationship with Majority level = 1 and T
TVAW
= 0 .............................................................................38
Fig. 9.17: Trigger configuration on GPO front panel output connector .......................................................................................39
Fig. 10.1: Required libraries and drivers ..........................................................................................................................................45
Fig. 11.1: CAENUpgrader Graphical User Interface ......................................................................................................................46
Fig. 11.2: CAENComm Demo Java and LabVIEW graphical interface .......................................................................................47
Fig. 11.3: CAEN WaveDump ............................................................................................................................................................48
Fig. 11.4: CAENScope main frame ..................................................................................................................................................49
Fig. 11.5: DPP-PSD Control Software: Top – DPP settings Tab and typical
60
Co Total Charge Spectrum; Bottom - PSD
2-D Scatter Plot ...................................................................................................................................................................................50
Fig. 11.6: MC²Analyzer (MC²A) software tool .................................................................................................................................51
Fig. 12.1: Front panel LEDs status at power ON............................................................................................................................52
List of Tables
Tab. 1.1: Table of models and related items .....................................................................................................................................7
Tab. 3.1: Specifications table ..............................................................................................................................................................9
Tab. 9.1: Buffer Organization ............................................................................................................................................................28
Tab. 9.2: TRG OPTIONS configuration table .................................................................................................................................29
Tab. 9.3: Event Format Example ......................................................................................................................................................30