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Datakom DPR-400 - Crc Calculation; Internal Record Storage Structure

Datakom DPR-400
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DPR-400 User Manual Rev_01 Firmware V-1.0
- 62 -
Follow the method shown below for CRC calculation,
1) A 16-bit variable named CRC with every bit set to 1 is initialized.
2) The result of the Boolean logic operation XOR of the bottom byte of CRC and the first byte of the
message (Function Code) is appended to CRC.
3) The least significant bit (LSB) of CRC has been defined. CRC is shifted right by 1 bit. Most
significant bit (MSB) of the CRC is set to 0.
4) If the LSB of the CRC is 1, CRC is XOR’d by A001h. The result is appended to CRC.
5) Steps 3 and 4 are repeated until 8 bits have been shifted.
6) Steps 2, 3, 4, 5 are repeated for the remaining 8 bits.
7) Once the process is complete for the entire data, the intermediate CRC value becomes final.
8) The calculated CRC is appended to the message packet starting with the bottom byte. The final
CRC value that must be calculated by the algorithm is shown below.
01 03 00 20 00 10 45 CC
01 06 00 40 00 10 89 D2
The unit features a 32-event capacity memory. To read the record memory, the record number from the
address “20899” is read. The read register value must be entered in the address “16389. Then, the
relevant record can be read starting from address “4096”.
REGISTER
ADDRESS
VARIABLE
DESCRIPTION
SIZE
(BIT)
R/W
TYPE
X
+0
+1
Date Time
32-bit date and time
information
Bits 0-4: second/2 (0-29)
Bits 5-10: minute (0-59)
Bits 11-15: hour (0-23)
Bits 16-20: day (1-
31)
Bits 21-24: month
(1-12)
Bit 25-31:
year-2000
(0-127=2000-2127)
32
R-O
bitmap
+2
millisecond
Milliseconds (0-1999)
16
R-O
unsigned
byte
-
+3_BOT
Type
Register Type
8
R-O
unsigned
byte
-
+3_TOP
Argument
Register Info
8
R-O
unsigned
byte
-
+4
+5
+6
+7
+8
+9
+10
+11
Matrix Input
Bit 0-15 digital inputs
Bit 16-62 protection
outputs
Bit 63-127 - reserved
8x16
R-O
unsigned
word
x1
14.6. CRC CALCULATION
14.7. INTERNAL RECORD STORAGE STRUCTURE

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