Dell EMC XC Core XC6515 - Processor Settings

Table 16. Memory Settings details (continued)
Option Description
Memory Interleaving Enables or disables the memory interleaving option. The two options available
are Auto and Disabled. This option is set to Auto by default.
Opportunistic Self-Refresh Enables or disables opportunistic self-refresh feature. This option is set to
Disabled by default.
Correctable Error Logging Enables or disables correctable error logging. This option is set to Enabled by
default.
Processor settings
To view the Processor Settings screen, power on the system, press F2, and click System Setup Main Menu > System BIOS >
Processor Settings.
Table 17. Processor Settings details
Option Description
Logical Processor Each processor core supports up to two logical processors. If this
option is set to Enabled, the BIOS displays all the logical
processors. If this option is set to Disabled, the BIOS displays only
one logical processor per core. This option is set to Enabled by
default.
Virtualization Technology Enables or disables the virtualization technology for the processor.
This option is set to Enabled by default.
IOMMU Support Enable or Disable IOMMU support. It is required to create IVRS
ACPI table. This option is set to Enabled by default.
L1 Stream HW Prefetcher Enables or disables the L1 stream hardware prefetcher. This option
is set to Enabled by default.
L2 Stream HW Prefetcher Enables or disables the L2 stream hardware prefetcher. This option
is set to Enabled by default.
MADT Core Enumeration Specifies the MADT Core Enumeration. This option is set to Linear
by default.
NUMA Nodes Per Socket Specifies the number of NUMA nodes per socket. This option is set
to 1 by default.
CCX as NUMA Domain L3 cache as NUMA Domain Enables or disables the CCXL3 cache as NUMA Domain. This
option is set to Disabled by default.
Minimum SEV-ES ASID Determines the number of Secure Encrypted Virtualization ES and
non ES available Address Space IDs. This option is set to 1 by
default.
x2APIC Mode Enable or disable x2APIC mode. This option is set to Enabled by
default.
Number of CCDs per Processor Controls the number of enabled CCDs in each processor. This
option is set to All by default.
Number of Cores per CCD specifies the number of cores per CCD. This option is set to All by
default.
Processor Core Speed Specifies the maximum core frequency of the processor.
Processor Bus Speed Specifies the bus speed of the processor.
NOTE: The processor bus speed option displays only
when both processors are installed.
Processor n
NOTE: Depending on the number of CPUs, there might
be up to n processors listed.
36 Pre-operating system management applications