Dell EMC XC640 Series - Memory population rules

Table 38. Memory population rules (continued)
Processor Configuration Memory population Memory population information
population should
match)
Mirroring population order
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
Mirroring is supported with 6
DIMMs per processor.
Single rank sparing population
order
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}…
Populate in this order, odd amount
per processor allowed. Requires
two ranks or more per channel.
Multi rank spare population
order
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}…
Populate in this order, odd amount
per processor allowed. Requires
three ranks or more per channel.
Fault resilient population order
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
Supported with 6 DIMMs per
processor.
Table 39. Memory population rules
Processor Configuration Memory population Memory population information
Dual processor (Start
with processor1.
processor1 and
processor 2
population should
match)
Optimized (Independent
channel) population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
Odd number of DIMM population per processor
is allowed.
NOTE: Odd number of DIMMs will result in
unbalanced memory configurations, which
in turn will result in performance loss. It
is recommended to populate all memory
channels identically with identical DIMMs
for best performance.
Optimizer population order is not traditional for
8 and 16 DIMMs installations for dual processor.
● For 8 DIMMs: A1, A2, A4, A5, B1, B2, B4, B5
● For 16 DIMMs:
A1, A2, A4, A5, A7, A8, A10, A11
B1, B2, B4, B5, B7, B8, B10, B11
Mirroring population
order
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Mirroring is supported with 6 or 12 DIMMs per
processor.
Single rank sparing
population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
● DIMMs must be populated in the order
specified.
● Requires two ranks or more per channel.
Multi rank sparing
population order
A{1}, B{1},
A{2}, B{2},
A{3}, B{3},
A{4}, B{4},
A{5}, B{5},
A{6}, B{6}
● DIMMs must be populated in the order
specified.
● Requires three ranks or more per channel.
Fault resilient population
order
A{1, 2, 3, 4, 5, 6},
B{1, 2, 3, 4, 5, 6},
A{7, 8, 9, 10, 11, 12},
B{7, 8, 9, 10, 11, 12}
Supported with 6 or 12 DIMMs per processor.
70 Installing and removing system components