T5L_ASIC Development Guide
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3.2 Memory
The 8051 kernel of OS can access seven different kinds of memory, which are shown as below.
It can only be read by MOVC instruction, same as standard
8051.
The same as standard 8051
The same as standard 8051. DWIN can provide user SFR
definition files( .INC or .H header file).
Accessible using the SFR register interface defined by EXADR,
EXDATA.
Accessible using MOVX instruction. When DPC is configured as
0x00, same as standard 8051.
Accessible using DGUS variable memory interface.
CAN Communication
interface
Accessible using DGUS variable memory interface.
3.2.1 Code Memory(64KBytes)
Functional partitioning and definition of the code memory space are shown in the following table.
After reset, the program starts running address .
External interrupt 0 program interface
Timer0 interrupt program interface
External interrupt 1 program interface
Timer1 interrupt program interface
UART2 TX/RX interrupt program interface
Timer2 interrupt program interface
CAN interface interrupt program interface
UART4 TX interrupt program interface
UART5 RX interrupt program interface
UART3 TX/RX interrupt program interface
0xFFFF will allow connection to JMARK interface for simulation debugging, and
other values will be prohibited.
Code identification, illegal values will cause OS 8051 to stop running.
The OS 8051 code is stored in the 0x01:0000-0x01:FFFF position of the 1Mbytes on chip Flash.
After power-on reset, the system loads and runs in RAM.
Code can only be written to on-chip Flash through SD interface or UART1 interface (or WIFI
network interface, etc).
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