T5L_ASIC Development Guide
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1 Summary
The T5L series ASIC is a single-chip and dual-core ASIC designed by DWIN technology co., ltd for
AIOT applications with low power consumption, high cost performance, GUI and highly integrated
application, including T5L1(low resolution) and T5L2(high resolution). Its main features are as follow:
(1) Mature and stable 8051 core which is the most widely used with the maximum operating
frequency of T5L is up to 250MHz, 1T(single instruction cycle)high speed operation.
(2) Separated GUI CPU core running DGUS II System:
➢
High-speed display memory, 2.4GB/S bandwidth, 24bit color display resolution supporting to
800*600(T5L1) or 1366*768(T5L2).
➢
2D hardware acceleration, the decompression speed of JPEG is up to 200fps@1280*800, the
UI with animation and icons as its main feature is extremely cool and smooth.
➢
Images and icons stored in JPEG format. Adopt Low-cost 16Mbytes SPI Flash.
➢
Support CTP or RTP with adjustable sensitivity and maximum 400Hz touch frequency.
➢
High-quality speech compression storage and playback.
➢
128Kbytes variable storage space for exchanging data with OS CPU core and memory
➢
1-way 15bit 32Ksps PWM digital power amplifier driver loudspeaker to save power amplifier
cost and achieve high signal-to-noise ratio and sound quality restoration.
➢
Support DGUS development and simulation on PC. Support background remote upgrade.
(3) Separated CPU (OS CPU) core runs user 8051 code or DWIN OS system, user CPU omitted in
practical application.
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