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Dwin T5L ASIC Series User Manual

Dwin T5L ASIC Series
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T5L_ASIC Development Guide
- 4 -
www.dwin-global.com
D
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Standard 8051 architecture and instruction set, 64Kbytes code space, 32Kbytes on-chip RAM.
64 bit integer mathematical operation unit(MDU), including 64bit MAC and 64 bit divider.
Built-in software WDT, three 16bit Timers, 12 interrupt signals with the highest four interrupt
embedding.
28 IOs, 4-channel UARTs, 1-channel CAN, up to 8-channel 12-bit A/Ds and 2-channle 16-bit
PWM of adjustable resolution.
Support IAP online simulation and debugging with unlimited number of breakpoints.
Upgrade code online through DGUS system.
(4) 1Mbytes on-chip Flash with DWIN patent encryption technology ensure code and data security.
(5) Reduces crystal requirements and PCB design challenges for a variety of inexpensive wide-
range tuned impedance crystal oscillators and PLLs.
(6) 3.3V IO voltage, adaptable to 1.8/2.5/3.3 various levels
(7) Support SD interface or UART1 download and configuration. Support SD card file reading and
rewriting.
(8) Support DWIN WiFi module to access to DWIN cloud directly, and easily development for
various cloud platform applications.
(9) Working temperature ranges from - 40 to +85 (Customizable IC for -55 to 105
operating temperature range )
(10) With low power consumption and strong anti-interference ability, it can work steadily on the
double-sided PCB design, and easy to pass EMC/EMI test.
(11) 0.4mm ELQFP128 packaging with low processing difficulty and low cost.
(12) T5L ASIC + LCD + TP + UI design support for industry customers with cost-effective matching
program sales and comprehensive technical service support.

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Dwin T5L ASIC Series Specifications

General IconGeneral
BrandDwin
ModelT5L ASIC Series
CategoryControl Unit
LanguageEnglish