Dwin T5L ASIC Series User Manual

T5L_ASIC Development Guide
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3.3 Mathematical Operating Unit(MDU)
Due to the limited computing power of 8051, the hardware mathematic unit (MDU) is extended in T5L
to improve computing power. OS 8051 applications can access hardware MAC and hardware divider.
The related SFR definitions are as follows:
SFR name
Address
Instruction
MAC_CN
0xE5
The MAC hardware multiplier-adder control register is defined as follows.
.7 MAC enable. Write 1 to perform a calculation, and clear after hardware execution;
.6 MAC mode. 1 for multiplier-adder mode: C=A*B+C; 0 for multiplier mode: C=A*B;
.5 Write 0;
.4 1=64bit MAC 0=32bit MAC(A3:0/B3:0/C7:0;note that C is still 64bit );
.3 1 = Signed number; 0 = Unsigned number;
.2-.0 Write 0;
The A
,
B
,
C
register group is the MDU_A, MDU_B, MDU_C register group of extended SFR registers.
DIV_CN
0XE6
DIV hardware divider control register (division C/A, quotient A, remainder B) is defined as follows:
.7 DIV enable. Write 1 to perform a calculation, and clear after hardware execution;
.6 DIV mode 1: Rounded 0: Not rounded;
.5-.4 Undefined, write 0;
.3 1 = Signed number 0 = unsigned number;
.2-.0 Write 0;
The A
,
B
,
C register group is the MDU_A, MDU_B, MDU_C register group of extended SFR
registers.
Example: 32bit MAC calculate 0x1234*0x5678-0x2000
MOV
EXADR,#04H
;write A3:A0=0x 00 00 12 34
MOV
EXDATA,#00H
MOV
EXDATA,#00H
MOV
EXDATA,#12H
MOV
EXADR,#34H
;write B3:B0=0x 00 00 56 78
MOV
EXDATA,#00H
MOV
EXDATA,#00H
MOV
EXDATA,#56H
MOV
EXDATA,#78H
MOV
EXADR,#10H
;write C7:C0=0xFF FF FF FF FF FF
E0 00 (-0x2000)
MOV
EXDATA,#0FFH
MOV
EXDATA,#0FFH
MOV
EXDATA,#0FFH
MOV
EXDATA,#0FFH
MOV
EXDATA,#0FFH
MOV
EXDATA,#0FFH
MOV
EXDATA,#0E0H
MOV
EXDATA,#00H
MOV
MAC_CN,#0C8H
;32bit integer MAC
MOV
A,MAC_CN
MOV
ACC,7,WTMAC
MOV
EXADR,#10H
;read results00 00 00 00 06 25 E0 60
MOV
R7,EXDATA

Dwin T5L ASIC Series Specifications

General

Brand	Dwin
Model	T5L ASIC Series
Category	Control Unit
Language	English