T5L_ASIC Development Guide
D
WI
N
T
echnology
Pro
f
essional
,
Credi
t
able
,
Success
f
ul
3.5 Watchdog Timer(WDT)
In order to monitor the operation of the software and ensure that that a system reset is
automatically generated to restore normalcy in the event of an abnormality, T5L OS 8051 is
equipped with a software watchdog (WDT) timer whose counting reset time is set to 1 second
(corresponding to 11.0592 MHz crystal).
Once the WDT is turned on, the software needs to feed the dog in the counting reset time,
otherwise a system reset will occur.
Reset does not influence the contents of 32KB data memory and 0x008000-0x00FFFF space
128KB DGUS variable memory.
The relevant reference codes for WDT operations are as follows.
To Next Page
Loading...
Need help?
General