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Dwin T5L ASIC Series - User Manual

Dwin T5L ASIC Series
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T5L_ASIC Development Guide
- 1 -
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T5L_ASIC Development Guide
Version 2.0
2022/4/13
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Dwin T5L ASIC Series Specifications

General IconGeneral
Frequency250MHz
Touch Panel TypeResistive/Capacitive
Operating Temperature-20°C to 70°C
Voltage Range3.3V
Touch ControllerIntegrated
PackageLQFP128
Operating SystemDGUS II
InterfaceUART, GPIO

Summary

1 Summary

2 Hardware Description

2.1 PIN Definition

Details the pin arrangement and functions of the T5L ASIC in ELQFP128 package.

2.2 Packaging Dimension

Provides detailed dimensions and tolerances for the ELQFP128 package.

2.3 Basic Performance Parameters

Lists key electrical and operational parameters for the T5L ASIC.

2.4 Notices for Hardware Design

Offers essential guidelines and precautions for designing hardware with the T5L ASIC.

3 OS CPU

3.1 Initial Configuration

Details the initial configuration of special function registers (SFRs) for the 8051 kernel.

3.2 Memory

Explains the different types of memory available: Code, Variable, Data, and Extended SFR registers.

3.3 Mathematical Operating Unit(MDU)

Introduces the hardware MAC and divider for improved computing power in the T5L.

3.4 Timer

Describes the three timers (T0/T1/T2) available in the T5L OS 8051.

3.5 Watchdog Timer(WDT)

Explains the software watchdog timer for system monitoring and reset.

3.6 IO

Details the three 8-bit parallel ports and one 4-bit parallel port, totaling 28 IO ports.

3.7 UART

Details the configuration and settings for UART interfaces: UART2, UART3, UART4, and UART5.

3.8 CAN

Details the SFRs associated with the CAN interface.

3.9 Interrupt System

Covers interrupt control SFRs and priority configuration for the T5L OS CPU.

3.10 T5 L ASIC 8051 Instruction Set

Lists the instruction format, length, and cycles for the T5L ASIC 8051 instruction set.

4 Simulation Debug

5 EK043 Evaluation Board