Dwin T5L ASIC Series User Manual

T5L_ASIC Development Guide
- 30
-
www.dwin-global.com
D WI N T echnology
Pro f essional , Credi t able , Success f ul
3.7.4 UART5
The relevant settings of UART5 are as follows:
SFR name
Address
Instructions
SCON3T
0xA7
UART5 sending control:
.7 UART5 sending enables. 0=close;1=open;
.6 0=8bit mode,1=9bit mode;
.5 TB8, 9
th
bit sent in 9bit mode;
.4-.1 Write 0;
.0 TI, send flag. The position at which the stop bit is sent.
SCON3R
0xAB
UART5 receive control:
.7 UART5 sending enables. 0=close;1=open;
.6 Write 0;
.5 TB8, 9
th
bit received in 9bit mode;
.4-.1 Write 0;
.0 R RI, receive mark. Set when the stop bit is received when a valid stop bit is received.
SBUF3_TX
0xAC
UART5 sending data interface
SBUF4_RX
0xAD
UART5 receiving data interface
BODE3_DIV_H
0xAE
UART5 baud rate setting
BODE3_DIV_H:L=CPU main frequency/(8*baud rate)
BODE3_DIV_L
0xAF
The relevant settings of UART5 interruption are as follows:
Interrupt type
Program entry
address
Trigger
marker
Interrupt enabling
control
Remarks
UART5 send
interrupt
0x0063
SCON3T.0
IEN1.4
After interruption, clear the interruption trigger mark by
software.
UART5 receive
Interrupt
0x006B
SCON3R.0
IEN1.5
After interruption, clear the interruption trigger mark by
software.

Dwin T5L ASIC Series Specifications

General

Brand	Dwin
Model	T5L ASIC Series
Category	Control Unit
Language	English