Fibocom MG661-EU - Page 19

2 Pin Definition
16
Table 12. SPI interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
101
SPI_FLASH_CLK
DO
PD
1.8V
SPI clock signal
100
SPI_
FLASH_SIO0
DIO
PD
1.8V
SPI data
transmission
107
SPI_
FLASH_SIO3
DIO
PD
1.8V
SPI data
transmission
108
SPI_
FLASH_SIO1
DIO
PD
1.8V
SPI data
transmission
109
SPI_
FLASH_SIO2
DIO
PD
1.8V
SPI data
transmission
79
SPI_ FLASH_CS
DO
PD
1.8V
SPI chip selection
Table 13. I2C interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
67
I2C2_SCL
OD
PU
1.8V
I2C clock signal, internal
software pull-up, external 1.8V
hardware pull-up can be
reserved, can be suspended
when not in use
66
I2C2_SDA
OD
PU
1.8V
I2C data signal, internal software
pull-up, external 1.8V hardware
pull-up can be reserved, can be
suspended when not in use
68
I2C3_SCL
OD
PU
1.8V
I2C clock signal, internal
software pull-up, external 1.8V