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Fibocom MG661-EU - Page 20

Fibocom MG661-EU
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2 Pin Definition
17
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
hardware pull-up can be
reserved, can be suspended
when not in use
69
I2C3_SDA
OD
PU
1.8V
I2C data signal, internal software
pull-up, external 1.8V hardware
pull-up can be reserved, can be
suspended when not in use
Table 14. Debug interface
Pin
No.
Pin Name
I/O
RESET
VALUE
Power
Domain
Description
39
DBG_TXD
DO
PU
1.8V
Debug serial port transmitting
38
DBG_RXD
DI
PU
1.8V
Debug serial port data
receiving
Table 15. USIM interface
Pin No.
Pin
Name
I/O
RESET
VALUE
Power
Domain
Description
11
USIM_D
ATA
DIO
--
1.8V/3V
(U)SIM data signal line,
SIM_DATA has internal pull-up,
external pull-up can be reserved
to SIM_VDD, keep NC first
12
USIM_R
ST
DO
--
1.8V/3V
(U)SIM reset signal line
13
USIM_C
LK
DO
--
1.8V/3V
(U)SIM clock signal line

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