Hioki 3561 - Synchronization Commands; Status and Event Control Commands; Set the OPC Bit of SESR When Finished All Pending Operations; Respond 1 When Finished All Pending Operations

7.6 Message Reference
112
Synchronization Commands
Status and Event Control Commands
Set the OPC bit of SESR When Finished All Pending Operations
Syntax
Command
∗
OPC
Description
Command
Sets OPC bit 0 of the Standard Event Status Register (SESR)
when all prior commands have finished processing.
Example
Command
A;B;∗OPC;C
The OPC bit of the SESR is set after commands A and B have
finished processing.
Respond "1" When Finished All Pending Operations
Syntax
Query
∗
OPC?
Response 1
Description
Query
Responds "1" when all prior commands have finished
processing.
Wait for Pending Commands to Finish
Syntax
Command
∗
WAI
Description
Command
The instrument waits until all prior commands finish before
executing any subsequent commands.
Note
The
∗WAI command is supported because it is defined in IEEE 488.2-
1987, but because all Model 3561(3561-01) device-specific commands
are sequential types, this command has no actual affect.
Clear the Status Byte and Related Queues (Except the Output Queue)
Syntax
Command
∗
CLS
Description
Command
Clears the event registers corresponding to each bit of the
Status Byte Register. Also clears the Status Byte Register.
Note The output queue is unaffected.
The output queue, the various enable registers and MAV bit 4
of the
Status Byte Register are unaffected.