Transmission Line Theory Applied to Digital Systems
Transmission Line Design
11-10
Example 2
The condition for a negative-going transition will now be analyzed. Refer to
Figure 11-5. The steady state high logic level current is:
For the conditions shown in Figure 11-5, the use of equation 6 shows that the
load resistor is indeed larger than required to turn off the output transistor
during a negative transition.
I
dc
V′
OH
R
o
Z
o
+
------------------ 1 1 . 6 mA==
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