Model 8904A Operation
3-10.
OPERATING TECHNICAL REFERENCE
Waveform Jitter
The
HP
8904A generates waveforms through a sampled digital process. The output clock frequency
for the digital-to-analog conversion process is approximately 1.67
MHz.
By Nyquist’s theorem, we can
conclude
that
the maximum possible frequency for the
HP
8904A would be
lx7
FHz
(
N
800 kHz).
Because
it
is
impossible
to
build an analog filter which has infinite cutoff slope, the maximum frequency
is
limited
to
600 kHz
to
accomodate a realizable filter.
Sinewaves produced by this process
will
have excellent time stability, however, square, ramp, and
triangle waveforms
will
have
Jitter.
The value of this jitter
will
be one clock cycle of the DAC:
1.67
LHz
(21
600 ns) for square and triangle waveforms. This value doubles
to
1200
ns
when using ramp waveforms
due
to
the fact
that
there
is
only one fast transition per cycle of this non-symmetrical waveform. Jitter
occurs
when the frequency of these waveforms
is
not harmonically related
to
the DAC clock frequency
(which
is
exactly
$
or
1,677,721.6 Hz).
For
example, if we choose a frequency of 24.5 kHz, this frequency divided
into
the clock yields
a
non-integer relationship (68.47). Therefore the
fast
edges
of
the square
or
ramp waveforms, and the
peaks of the triangle wave, do not always align with the clock. The result of this
is
that
an occasional
fast transition
occurs
one DAC cycle before
or
after
the correct time. This causes
a
maximum jitter
of
600 ns.
Unlike other types of jitter, the jitter produced by the
HP
8904A does not occur on every cycle,
and
the severity of the jitter
is
predictable by calculating how
far
from a perfect frequency relationship a
particular waveform
is
from the clock frequency. If we chose
a
different frequency, such as
23.3
kHz,
the jitter will be almost zero because the frequency relationship
is
nearly integral: 72.005. Since this
frequency is harmonically related
to
the clock frequency the
fast
edges almost always coincide with the
output clock
of
the DAC.
All sampled synthesizers have this jitter.
For
the
HP
8904A, all waveforms have this jitter except
sinewaves
(of
course DC and noise do not either). The sinewave has no instantaneous transitions and
therefore has no jitter. In addition, the trigger outputs (both the polarity and zero crossing outputs
from the Digital
Port)
will always have jitter; again, depending on the frequency selected, even
if
the
waveform being produced is a sinewave.
Fine Amplitude Resolution
The
HP
8904A appears to have
34
digits
of
available resolution when viewed from the front panel.
However, the available resolution is much better than what is shown. The displayed resolution
was
limited
to
34
digits due to display constraints. There are actually 2048 available amplitude steps
for
each attenuator range. To understand how this works, an explanation
of
the implementation
of
the
HP
8904A’s amplitude control is needed.
All fine amplitude setting
for
the
HP
8904A are handled in the digital domain using the Digital
Waveform Synthesis
IC.
A
very high performance 12 bit by
12
bit multiplier
is
available in this
integrated circuit. Normally the multiplier is used for various types
of
amplitude modulation.
It
is
also used to scale the amplitude of waveforms for summing, and
to
provide the fine level settings.
The analog output board has several attenuators which provide the large amplitude steps. The available
attenuators are: 6
dB,
12
dB,
24
dB,
and
48
dB.
Various combinations
of
these attenuators are used
to
provide amplitude steps
of
approximately 6
dB
(they are exactly
$
of the previous scale which
is
-6.02
dB).
The following table shows the output voltage ranges and which combination
of
attenuators
are used
for
each.
3-39
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