Model 4342A
4-31.
IMPEDANCE CONVERTER(P/O Al Al) AND
RF POWER AMPLIFIER(AlA2)
4-32. FET Q3 provides a high input impedance for
the impedance Converter circuit. Transistor Q5 is
used as a current source and Q4 provides positive
feedback to make Q3 gain equal to unity. Emitter
follower QS provides low impedance output signals to
the RF Amplifier stage. Inductor L8 acts as a para-
sitic oscillation suppressor and C30 is a dc blocking
capacitor. The signal from the Impedance Converter
is ac coupled to RF Power Amplifier Q2 via C2. Tran-
sistors Ql and Q2 form a cascade stage as previously
described in paragraph 4-12. Resistor Rll and C6
form a frequency compensation network and C5 is a
bypass capacitor. Transistors Q3 and Q4 form an
Impedance Converter as described in paragraph 4-
12. Inductor Ll and L4 are parasitic oscillation
suppressors.
4-33. ALC AMPLIFIER(P/O A81
4-34. Transistor Q9 thru Q13 form the ALC Ampli-
fier assembly. FET Q9Aand Q9Bform a differential
amplifier with Qll as its current source.
A portion
of the rectified RF Amplifier signal is taken across
diode A3CRl and coupled to FET Q9B. Transistors
QlO and Q12 form another differential amplifier with
Q13 as its current source. The drain output signal
of FET Q9B turns on transistor Q12.
The current
flowing through the collectors of transistors AlAlQl
and AlAlQ2 is caused to vary by the setting of the
OSC LEVEL control R26. This variation in AlAlQl
collector current causes a change in the tuned circuit
current and the gain of the Oscillator is thereby con-
trolled. Cl0 provides ac feedback and circuit stabili-
zation.
4-35. Q RANGE ATTENUATOR(A3l
4-36. The Q Range Attenuator with a total attenuation
of 30.4dB covers the entire frequency range. The
following steps of 10.4dB, 9.6dB, and 10.4dB are
provided to correlate the meter reading with the Q
Ranges used in the proper ratio (ie. 30/3, lOO/lO,
etc. ). The maximum insertion loss is 0. 1dB and the
impedance is 50R nominal. The Q Attenuator output
is coupled to Impedance Converter A4 which is ar-
ranged in a Darlington pair configuration.
4-37. IMPEDANCE CONVERTER, RF AMPLIFIER
AND DETECTOR(A5J
4-38. The Impedance Converter Ql-Q4 is identical
in operation to the description given in paragraph
4-32. Diode CR1 protects Q4 from initial current
surge. TransistorsQS-Q9 provide RF amplification
for the broad bandRF fraquencieswith a total gain of
approximate 34dB. Variable resistor R32 and vari-
able capacitor Cl6 provide for the adjustment of me-
dium and high frquency response of the amplifier
respectively. A flat response is obtained through out
the entire frequency band. The signal is ac coupled
to detector diode CR2 via C19. Capacitor C20 pro-
vides filtering action. Diodes CR3 thru CR5 in con-
junction with R42 and R43 cancel the non -1inearities
of diode CR2. A linear reading is provided to the
meter circuit.
Section IV
Paragraphs 4-31 to 4-45
4-39. DC AMPLIFIER(A6)
4-40. FET Ql supplies &ANALOG OUTPUT propor-
tional to the meter deflection to Jl connector. Vari-
able resistors R4 and R6 are used for the settings of
the &ANALOG OUTPUT-BALANCE and GAIN respec-
tively. FET Q2Aand Q2Bform adifferential amplifier
with transistor Q4 as a current source. Diode CR1
compensates for temperature changes. Q3 and Q5
supply current drive to the meter. Resistors R2 and
R21 provide for Xl GAIN and X10 GAIN adjustments
respectively. Zenor diode CR2 and CR3 are used to
regulate for the +25V and -25V supplies, inductors
Ll, L2 and capacitors C2, C3 are used to obtain ad-
ditional filtering of meter circuit supply voltages.
Resistor R2 (mounted on chassis) provides for METER
ZERO adjustment. Resistors R3 and R4(mounted on
chassis) are used for the
AQ ZERO FINE and COARSE
adjustments respectively.
4-41. Q LIMIT SELECTOR(A71
4-42. High impedance FETs Ql and Q2 form a com-
parator circuit. Emitter follower Q3 dc couples the
comparator output to the Schmitt trigger Q4 and Q5.
Capacitor C2 is used as a negative feedback path to
reduce the ripple voltage at Q3 emitter. Transistors
Q4 and Q5 provide Schmitt trigger action. When Q4
base voltage reaches 9V, the transistor will turn on
and Q5 which is normally on will turn off.
A positive
going pulse will be generated and coupled via capacitor
C3 and diode CR3 to the one-shot multivibrator QS
and Q7. Normally, transistor Q7 is on and Q6 is cut
off by the voltage drop across the common bias resis-
tor R19. The pulse from Q5 turns onQ6 which in turn
switches off Q7 for one second. Capacitor C6, resis-
tors R20, R21, and R22 determine the constant of the
circuit. Transistor Q8 turned on by the rise in Q7
collector voltage operates Kl the OVER LIMIT DIS-
PLAY relay. Transistor Q9(normally on) is used for
00 OVER LIMIT DISPLAY TIME. Diodes CR5 and
CR6 protect Q8 and Q9 against initial line transient
when the instrument is turned on.
4-43. POWER SUPPLY(P/O A8)
4-44. Description of the Power Supply operation will
pertain to the +25 volt supply. For the negative supply,
operation will be identical but with reversed polarities.
Rectifiers CR1 thru CR4form a fullwave bridge rec-
tifier for the +25 volt supply.
In this arrangement
two rectifiers operate in series on each half of the
cycle, one rectifier being in the lead to the load; the
other being in the return lead.
4-45. Pulsating(rectified) dc at the output of the four-
diode rectifier bridge is applied to the collector of
the series regulator Ql. Closely matched transistors
Q2, Q5 and Q3, Q4 form differential amplifier with
high common mode signal rejection. The output volt-
age is applied across Rll, R12, and R13 a voltage
divider, such that some fraction of this voltagewill
be applied to the base of Q5.
Should the voltage at
the base of Q5 increase, its collector will gomore
negative. This negative going signal will be applied
through emitter follower Q4 and cause Q3 collector
to go negative. The negative going signal from Q3 is
coupled through emitter follower Ql and seriesregu-
later Ql (mounted on chassis). Subsequently the signal
4-3
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