Hytera PNC550 - Page 22

B9
Circuit Description
15
External Memory
AP
PMU
S3
LDO5
LDO8
VREF _LPDDR
VDDPX
_3
MSM
_RESO UT_N
VDDPX_7
SDC1_DATA[7:0]
SDC1_CMD
SDC1_RCLK
SDC1_CLK
EBI0_CKE_0/1
EBI0_CS_N0/1
EBI0_DM[3:0]
EBI0_DQS[3:0]
EBI0_DQSB[3:0]
EBI0_CK/CKB
EBI0_CA[9:0]
EBI0_DQ[31:0]
eMMC
VCCQ
VCC
RST_N
CMD
RCLK
CLK
DAT[7:0]
CS0_N/CS1_N
CKE0/CKE1
DM[3:0]
DQS_T[3:0]
DQS_C[3:0]
CLK_T,CLK_C
CA[9:0]
DQ[31:0]
VDD2
VDD1
VDDQ
VDDCA
VREF CA/VREFDQ
ZQ0
ZQ1
V
SS
V
SS
1.2V
10K
1.8V
2.9V
LPDDR3
I/O Interface Description
EBI Single channel 32-bit LPDDR3 SDRAM (Dual rank)
SDC1 eMMC 5.1 (From 2 GB to 128 GB)
SDC2 SD3.0